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System Level Verification

Mountain View, CA 94043

Posted: 07/30/2018 Employment Type: Contract Industry: Hardware Job Number: 18695

Position Title:  System Level Verification

Position Description:  Protingent Staffing has an exciting contract opportunity with our client in Mountain View, California.

Job Qualifications:
  • Verilog knowledge – must have
  • C/C++ coding a must – must have
  • Strong scripting skills (Python, Ruby, TCL, Shell, Perl etc.) – must have at least one
  • Unit/Chip/Full system level ASIC Verification skills, and debug skills (using waveforms and Verdi source level debug  ) – must have
  • Block/unit level verification skills using OVM/UVM – must have
  • Basic system level knowledge {CPU + caches + GPU + multi-media engines + Southbridge}   must have
    • System level knowledge/verification does not mean signal integrity checking, electrical checks, EMC checks, thermal checks, ATPG testing on a board, DFT/DFx testing, static timing analysis, lint checking
  • Excellent communication skills and demonstrate the desire to take on diverse challenges
  • Board level debug with logic analyzers, scopes a plus
  • Experience working with x86_64 architecture a plus
  • Experience working with PCI-Express a plus

About Protingent:  Protingent is a niche provider of top Engineering and IT talent to Software, Electronics, Medical Device, Telecom, and Aerospace companies nationwide. Protingent exists to make a positive impact and contribution to the lives of others as well as our community by providing relevant, rewarding, and exciting work opportunities for our candidates.

Benefits Package: Protingent offers competitive salary, 100% paid health insurance, education/certification reimbursement, pre-tax commuter benefits, Paid Time Off (PTO) and an administered 401k plan.

Job Description

Core Responsibilities:

As a unit/chip/system verification engineer you will be involved in developing, debugging test environments as well as tests. You will also be involved in receiving and testing RTL and test bench drops from vendors and integrating these into verification environment(s). Closely work with RTL/verification/design/SW engineers for debug and root-cause. Develop and debug related RTL models, assertions, collateral. Scripting and UVM coding as required.


Minimum BS (EE or CS) required with over 5 years relevant experience.
Can you also send me resumes of • firmware developers and driver developers who have good hardware knowledge • they will probably not list UVM knowledge in their resumes • scripting knowledge could also be optional • Verilog knowledge/System Verilog knowledge may not be listed also, but I will need to evaluate this

Nick Vella

In 9 years of recruiting my style can be described as being direct, detailed, persistent. I will provide you with all necessary info needed to make the best decision for yourself. Each of my candidates that I’m representing is my #1 priority. I work around the clock to move a process along, to search and network for other potential opportunities to pitch a candidate to. The entire recruiting cycle process is all about creating a smooth experience for both the candidate and client. I feel I do that by my attention to detail, organization and ability to communicate effectively with each individual candidate. On my time off, I love to cook for my wife and 2 kids and ran my first Triathlon this April in Napa.

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