FPGA/ASIC Design Engineer
San Jose, CA 95124
Position Title: FPGA/ASIC Design Engineer
Position Description: Protingent Staffing has an exciting contract opportunity with our client in San Jose, California.
- Create FPGA based designs using Vivado
- Prototyping of ASIC RTL to FPGA
- Do RTL coding, LINTing and sanity testing of the implemented design
- Work closely with Verification and Validation team to debug the issues
- Experience with designing with FPGA using Vivado
- experience in C, C++, Verilog, System Verilog, VHDL, Perl, Python, TCL, Linux
- Work experience or familiar with DDR SDRAM memory systems
- Ability to develop comprehensive test plans for specific board interfaces
- Fundamental understanding of high speed digital design and mixed signal
- Experience with hardware design
- Transform manual work into automatic processes using scripts
- Develop and Review Test Plan based on design specification
- Excellent analytical and debug skills
- Excellent written and oral communication skills
- Bachelor/Masters Degree in Electrical/Electronics/Computer Engineering
- 4+ years professional experience in Hardware designing and developing
About Protingent: Protingent is a niche provider of top Engineering and IT talent to Software, Electronics, Medical Device, Telecom, and Aerospace companies nationwide. Protingent exists to make a positive impact and contribution to the lives of others as well as our community by providing relevant, rewarding, and exciting work opportunities for our candidates.
Benefits Package: Protingent offers competitive salary, 100% paid health insurance, education/certification reimbursement, pre-tax commuter benefits, Paid Time Off (PTO) and an administered 401k plan.