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Ready to launch your career in Vendor Management Systems (VMS)? Explore our exciting job opportunities in this dynamic industry that offers endless growth potential and a chance to make a real impact. Joining the VMS sector means being part of an innovative field that drives efficiency, cost savings, and improved outcomes for businesses. With a focus on cutting-edge technology, process improvement, and shaping the future of workforce management, a career in VMS promises job satisfaction and the opportunity to contribute meaningfully to society. Dive into our listings today and discover the rewarding path that awaits you in VMS!

Design Verification Engineer

Austin, TX 78746

Posted: 02/06/2024 Employment Type: Contract Industry: VMS Job Number: 28346

Job Description

Position Title: Design Verification Engineer

Position Description: Protingent Staffing has an exciting contract opportunity for Design Verification Engineer with our client that is located in Austin, TX.

Job Responsibilities: As a Design Verification Engineer you will contribute to the functional verification of GPU Subsystems such as Shader, Texture, and Memory Systems.

• Triage regression failures and make testbench updates
• Debug functional errors in RTL model using simulation and debug tools.
• Maintain efficient and clean regression status
• Develop Scalable SystemVerilog/UVM testbenches for unit level and/or Cluster level verification.
• Review Architecture and Micro-Architecture specifications.
• Closely work with Architects and RTL designers.
• Define, maintain and execute unit level and/or Cluster level verification testplans.
• Generate and run Testcases on logic simulation models.
• Code Functional coverage models and System Verilog assertions.
• Drive Functional Coverage and Code coverage to closure.

Job Qualifications:

• Integrate C++ reference model into Scoreboards
• 10+ year’s industry experience in a design verification role.
• Proficient in System Verilog/UVM/OVM, OOP/C++
• Knowledge of GPU, experience with Shader, Texture, or Memory System a plus
• Experience with code coverage and functional coverage driven verification methodology.
• Experience in creating, running and debugging of SystemVerilog/UVM constraint-random Testbench.
• Excellent working knowledge of scripting languages such as Python or Perl.
• Understanding of micro-architecture, logic design, FSMs, arithmetic datapath pipelines.
• Strong functional verification experience including Test planning, Testbench Architecture, Test/Coverage Model/Assertion Development.
• Strong debugging skills
• Strong programming skills with good understanding of algorithms and data structures
• Good verbal and written communication skills.

Job Details:

• Contract: 12 months
• Pay Rate: $60 - $68 / hr
• Location: Austin, TX.

Benefits Package: Protingent offers competitive salaries, insurance plan options (HDHP plan or POS plan), education/certification reimbursement, pre-tax commuter benefits, Paid Time Off (PTO), and an administered 401k plan.

About Protingent: Protingent is a niche provider of top Engineering and IT talent to Software, Electronics, Medical Device, Telecom, and Aerospace companies nationwide. Protingent exists to make a positive impact and contribution to the lives of others as well as our community by providing relevant, rewarding, and exciting work opportunities for our candidates.

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