Design Verification Engineer
3900 N Capital of Texas Hwy, Austin, TX 78746
Position Title: Design Verification Engineer
Position Description: Protingent has an exciting contract opportunity with our client in Austin, Texas.
- Learn the architecture and micro architecture by studying specifications and direct interaction with architects and logic designers of the Coherent fabric and LPDDR memory controller.
- Develop test plans, test benches and tests, creating sequencers, drivers, checkers, and monitors in a UVM environment.
- Enhance test benches and tests to achieve coverage goals.
- Create and support test environments for different design hierarchy levels.
- Support unit and super-unit debug on simulation platforms.
- BSEE, Computer Engineer or comparable and 2+ years of experience
- Experienced with verification methodology such as UVM/VMM/OVM.
- Developed test plans of complex systems containing multiple state machines and protocol rules.
- Composed functional coverage assertions, preferably using System Verilog.
Preferred Job Qualifications:
- Exposure to either CPU coherency protocols or DDR memory controllers.
- ARM-ACE Coherency or LPDDR4/5 experience would be a bonus.
- Proficient in System Verilog, C++, and Python/Perl scripting
- Excellent verbal and written communication skills.
About Protingent: Protingent is a niche provider of top Engineering and IT talent to Software, Electronics, Medical Device, Telecom and Aerospace companies nationwide. Protingent exists to make a positive impact and contribution to the lives of others as well as our community by providing relevant, rewarding and exciting work opportunities for our candidates.
Benefits Package: Protingent offers competitive salary, 100% paid health insurance, education/certification reimbursement, pre-tax commuter benefits, Paid Time Off (PTO) and an administered 401k plan.