9845 Willows Road NE, Willows Commerce II Building A Redmond, WA 98052
Position Title: Design Engineer
Position Description: Protingent Staffing has an exciting contract opportunity with our client in Redmond, Washington.
- Implement algorithm blocks as RTL code as defined in the Micro Architecture . Implement RTL using HLS and System Verilog.
- Support DV team for verification of blocks
- Assist with synthesis and timing closure. Work with FPGA engineers to perform early prototyping .
- Support handoff and integration of blocks into larger SOC environments.
- Assist with Algorithm analysis, verification and improvement.
- Contribute to ASIC digital architecture, design and verification.
- Ability to document and communicate clearly
- 5-8 years of experience as a Digital Design Engineer.
- Experience with HLS Catapult tool is a big plus but not a must.
- Experience in RTL coding, Lint/CDC tools, synthesis and LEC tools
- HLS coding using Catapult and Xilinx Vivado tools.
- System Verilog OVM/UVM DV experience.
- Python (or similar) scripting experience.
- ASIC design experience.
- Masters Degree in EE
Benefits Package: Protingent offers competitive salary, 100% paid health insurance, education/certification reimbursement, pre-tax commuter benefits, Paid Time Off (PTO) and an administered 401k plan.
About Protingent: Protingent is a niche provider of top Engineering and IT talent to Software, Electronics, Medical Device, and Aerospace companies nationwide. Protingent exists to make a positive impact and contribution to the lives of others as well as our community by providing relevant, rewarding and exciting work opportunities for our candidates.